
Maliang Liu
mlliu@xidian.edu.cn
Education
2011-2015 Ph.D. in Microelectronics and Solid-State Electronics, Xidian University
2008-2011 Master's Degree in Signal and Information Processing, Xidian University
2004-2008 Bachelor's Degree in Electronic Information Engineering, Xidian University
Experience
2024–Present:Researcher, Hefei National Laboratory
2020–Present: Professor, Xidian University
2017-2019: Associate Professor, Xidian University
2015-2017: Lecturer, Xidian University
Overview of Academic Research
Conducts systematic research in quantum computing & quantum measurement and control, cryogenic electronics, and quantum measurement and control chips. Focuses on overcoming core challenges in multi-system quantum measurement and control systems, such as ultra-large scale, ultra-low power consumption, cryogenic temperatures, ultra-high stability, ultra-high precision, and ultra-high integration. Key achievements include:
1)Proposed and implemented measurement and control chips integrating control, processing, and regulation, overcoming bottleneck issues of high-speed devices in conventional systems and reducing system power consumption by orders of magnitude.
2)Established evaluation index systems for quantum chips and measurement/control systems, and constructed optimized measurement/control systems based on the integrated design of the measurement/control system, quantum chip, and cryogenic platform.
3)Developed measurement and control link chips operating in cryogenic environments, exploring related mechanisms in cryogenic electronics.
4)Related results published in journals and conferences including JSSC, TMTT, RFIC, and TCAS I/II.
Research Directions/Fields:
1)Integrated Design of Quantum Measurement/Control Systems - Quantum Chips - Cryogenic Platforms
2)Cryogenic Electronics Mechanisms and Chip Design
3)High-Performance, High-Precision Quantum Control and Readout
4)Mixed-Signal Integrated Circuit and Superconducting Circuit Design
Major Honors and Awards
2020: First Prize, Chinese Institute of Electronics
2018: First Prize, Shaanxi Provincial Science and Technology Award
Representative Publications
1.C. Zhang et al., "A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS," IEEE Journal of Solid-State Circuits, vol. 58, no. 11, pp. 3179-3193, Nov. 2023.
2.J. Wei, "A 11-Bit 1-GS/s 14.9mW Hybrid Voltage-Time Pipelined ADC With Gain Error Calibration," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 3, pp. 799-803, March 2022.
3.C. Zhang et al., "An 8-Bit 4-GS/s Single-Channel Two-Step ADC Featuring Non-Symmetrical Pipeline Timing and Hybrid-Loop Amplifier," IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
4.C. Zhang et al., “A 40GS/s 8bit Time-Interleaved Time-Domain ADC Featuring SFDR-Enhanced Sample-and-Hold Circuit and Power-Efficient Adaptive Pulse Generator in 28nm CMOS” in 2025 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), San Francisco, CA, USA, 2025. Best Student Paper Award.
5.J. Xiao et al., “A 19.4-fsRMS Jitter 0.1-to-44GHz Cryo-CMOS Fractional-N CP-PLL Featuring Automatic Bleed Calibration for Quantum Computing” in 2025 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), San Francisco, CA, USA, 2025. Best Student Paper Award.


